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Running DPU IP with the Vitis™ AI Platform on the Zynq® UltraScale+™ MPSoC ZCU102 Evaluation Kit

Webinar

Available On-Demand

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Summary


Deep-learning processor unit (DPU) IP is designed to accelerate the deep-learning inference algorithms that are widely adopted in various computer vision applications, such as image/video classification, semantic segmentation, and object detection/tracking. ​

The Vitis™ AI environment offers a series of different DPUs for both Alveo™ data center accelerator cards and adaptive SoCs, such as the Zynq® UltraScale+™ MPSoC and Versal® ACAP. ​

The Vitis AI kit provides targeted reference designs (TRDs) that illustrate how to use the DPU IP in the Vitis AI environment to build and run deep neural network applications. With TRDs, AI developers can jump start their DPU integration with different parameters to meet performance and resource utilization requirements.​

We will use the Zynq UltraScale+ MPSoC ZCU102 evaluation kit to run example models such as OpenPose and ResNet50. ​

In this webinar, we’ll cover:​

  • An overview of DPUs​
  • The Vivado® IP integrator flow for hardware design​
  • The PetaLinux flow for software design with the Vitis AI platform​

We’ll also leave plenty of time for Q&A with our technical experts as well as provide additional resources to help you on your journey. Register now.


Featured Speakers


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James Quiaoit

Field Application Engineer, AMD

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Quenton Hall

Sr. Technical Marketing Manager, AMD

Register Now!

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