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Vitis AI Webinar Series

Webinar

Available On-Demand

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Summary

SESSION 1: Deploying HLS Kernel-Based User-Defined Operators with the Vitis™ AI Platform​

Quantization makes it possible to use integer computing units and to represent weights and activations by lower bits. AI developers often leverage quantization to achieve high performance and high energy efficiency without compromising accuracy on adaptive platforms from AMD Xilinx. With the Vitis AI platform, designers can define custom operators (OPs) during quantization to elevate performance and deploy models with custom operators. ​

The expanded capability of Vitis AI environment 2.5 supports PyTorch and TensorFlow2 models with custom operators. ​

This webinar illustrates the workflow that allows developers to plug in their application-specific layer implementation with HLS kernels on the Versal AI Core series VCK190 development kit.​

In this webinar, we’ll cover the following:​
  • An overview of customer operators​
  • A demonstration of the workflow that allows developers to plug in their application-specific layer implementation with HLS kernels in the quantization phase​
  • After this webinar, attendees will be able to define custom OPs with PyTorch or TensorFlow models and deploy the optimized model on evaluation boards from AMD Xilinx.​
SESSION 2: Introducing WeGO and a User-Defined Model Flow on the Versal® ACAP VCK5000 Development Card

Whole Graph Optimizer (WeGO) offers a streamlined solution to deploy AI models on cloud deep-learning processor units (DPUs) by integrating the Vitis AI development kit with native frameworks. ​

With WeGO, AI developers can reuse existing Python code, including pre-processing and post-processing, to achieve optimal performance during the training phase to gain early feedback on the inference result. This leads to faster deployment and evaluation cycles for AI models.​

We’ll use example designs from the Vitis AI platform tutorial on GitHub to illustrate the development flow on the Versal ACAP VCK5000 development card.​

In this webinar, we will cover the following:​
  • The latest WeGo features in Vitis AI environment 2.5​
  • Demonstration of the development flow on the Versal ACAP VCK5000 development card​
If you are looking for an adaptive AI solution for the data center with high end-to-end performance, this webinar will help you jump start your journey. 

SESSION 3: Running DPU IP with the Vitis AI Platform on the Zynq® UltraScale+™ MPSoC ZCU102 Evaluation Kit

Deep-learning processor unit (DPU) IP is designed to accelerate the deep-learning inference algorithms that are widely adopted in various computer vision applications, such as image/video classification, semantic segmentation, and object detection/tracking. ​

The Vitis AI environment offers a series of different DPUs for both Alveo™ data center accelerator cards and adaptive SoCs, such as the Zynq UltraScale+ MPSoC and Versal ACAP. ​

The Vitis AI kit provides targeted reference designs (TRDs) that illustrate how to use the DPU IP in the Vitis AI environment to build and run deep neural network applications. With TRDs, AI developers can jump-start their DPU integration with different parameters to meet performance and resource utilization requirements.​

We will use the Zynq UltraScale+ MPSoC ZCU102 evaluation kit to run example models such as OpenPose and ResNet50. ​

In this webinar, we’ll cover:​
  • An overview of DPUs​
  • The Vivado® IP integrator flow for hardware design​
  • The PetaLinux flow for software design with the Vitis AI platform​

Featured Speakers


dachang-li.jpg
Dachang Li

Sr. Technical Marketing Manager, Vitis AI, AMD


Register Now!

Click the HTML icon in the toolbar above to edit spacer height.
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