Summary

The rapid rise of technologies driving data-intensive applications such as 5G, AI, and machine learning has strained the capabilities of CPUs, GPUs, FPGAs, and SoCs. With the end of Moore’s Law significantly limiting the advantages of moving to smaller process nodes, architectural innovation is a must for any devices intending to solve the challenges posed by these and other demanding applications. Versal® adaptive compute acceleration platforms (ACAPs) represent a significant evolution over traditional FPGAs and SoCs, supplementing the strengths of traditional programmable logic with powerful heterogeneous compute engines and a new software-programmable silicon infrastructure.

In this webinar, we’ll cover the following:

• An overview of the Versal architecture and the Versal Prime series
• How the Versal architecture delivers performance gains at the system-level
• A demonstration of the programmable network on chip (NoC), one of the key features accelerating productivity for system designers

We’ll also have a live Q&A session with our product line manager and technical expert.

Featured Speakers

Ryan Koehn

Product Line Manager, Xilinx

Brandon Day

Senior Technical Marketing Manager-DDR, HBM, and NoC, Xilinx